Asus Maximus II Gene - Manuel (Page 5)

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Table des matières
3.3.7 CPU Clock Skew ........................................................... 3-10
3.3.8 NB Clock Skew ..............................................................3-11
3.3.9 FSB Strap to North Bridge .............................................3-11
3.3.10 DRAM Frequency ..........................................................3-11
3.3.11 DRAM CLK Skew on Channel A/B 1/2 ..........................3-11
3.3.12 DRAM Timing Contro .....................................................3-11
3.3.13 DRAM Static Read Control ........................................... 3-13
3.3.14 DRAM Read Training .................................................... 3-13
3.3.15 MEM. OC Charger ........................................................ 3-13
3.3.16 Ai Clock Twister............................................................. 3-13
3.3.17 Ai Transaction Booster .................................................. 3-13
3.3.18 Load-Line Calibration .................................................... 3-14
3.3.19 CPU Differential Amplitude............................................ 3-14
3.3.21 CPU Voltage ................................................................ 3-14
3.3.22 CPU PLL Voltage .......................................................... 3-14
3.3.23 FSB Termination Voltage............................................... 3-14
3.3.24 DRAM Voltage .............................................................. 3-14
3.3.25 Nroth Bridge 1.1 Voltage ............................................... 3-14
3.3.26 South Bridge 1.1 Voltage .............................................. 3-15
3.3.27 South Bridge 1.5 Voltage .............................................. 3-15
3.3.28 CPU GTL Voltage Reference (0/2) ................................ 3-15
3.3.29 CPU GTL Voltage Reference (1/3) ................................ 3-15
3.3.30 NB GTL Reference ........................................................ 3-15
3.3.31 DDR2 ChA/B Reference Voltage .................................. 3-15
3.3.32 North Bridge DDR Reference ....................................... 3-15
3.3.34 Keyboard TweakIt Control ............................................. 3-15
3.3.35 CPU Spread Spectrum ................................................. 3-15
3.3.36 PCIE Spread Spectrum ................................................. 3-16
3.4 Main menu (menu principal) ..................................................... 3-17
3.4.1
System Time ................................................................. 3-17
3.4.2 System Date ................................................................. 3-17
3.4.3 Language ...................................................................... 3-17
3.4.4 SATA 1–6 .........................................................................................3-18
3.4.5 Storage Configuration ................................................... 3-20
3.4.6 AHCI Configuration ....................................................... 3-21